LANS Seminar

Seminar Title: Hardware-Conscious Optimization of the Quantum Toffoli Gate
Speaker: Max Bowman
Title: Senior Undergraduate Student, Rice University

Date/Time: December 21, 2022 / 10:30 AM – 11:30 AM
Location: See meeting URL on the cels-seminars website (requires Argonne login)

Host: Jeff Larson

Description: While quantum computing holds great potential in several fields including combinatorial optimization, electronic structure calculation, and number theory, the current era of quantum computing is limited by noisy hardware. Many quantum compilation approaches, including noise-adaptive compilation and efficient qubit routing, can mitigate the effects of imperfect hardware by optimizing quantum circuits for objectives such as critical path length. Few of these approaches, however, consider quantum circuits in terms of the set of vendor-calibrated operations (i.e., native gates) available on target hardware. In this paper, we review and expand both analytical and numerical methodology for optimizing quantum circuits at this abstraction level. Additionally, we present a procedure for combining the strengths of analytical native gate-level optimization with numerical optimization. We use these methods to produce optimized implementations of the Toffoli gate, a fundamental building block of several quantum algorithms with near-term applications in quantum compilation and machine learning. This paper focuses on the IBMQ native gate set, but the methods presented are generalizable to any superconducting qubit architecture. Our analytically optimized implementation demonstrated a 18% reduction in infidelity compared with the canonical implementation as benchmarked on IBM Jakarta with quantum process tomography. Our numerical methods produced implementations with six multi-qubit gates assuming the inclusion of multi-qubit cross-resonance gates in the IBMQ native gate set, a 25% reduction from the canonical eight multi-qubit implementation for linearly-connected qubits. These results demonstrate the efficacy of native gate-level optimization of quantum circuits and motivate further research into this topic.

Bio: Max Aksel Bowman is a senior undergraduate student at Rice University studying Electrical Engineering. He has worked as a DOE SULI intern and a technical research aide at Argonne National Laboratory in the Laboratory for Applied Mathematics, Numerical Software, and Statistics (LANS) and the Argonne Leadership Computing Facility (ALCF). His research focuses on analytical and numerical techniques for optimizing quantum circuits targeting superconducting architectures at the abstraction level of vendor-calibrated gates (i.e., native gates).

Please note that the meeting URL for this event can be seen on the cels-seminars website, which requires an Argonne login.